optical/NxFuncs/fmc/corefmc.c
2025-09-04 09:45:08 +08:00

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#include "corefmc.h"
#include "fmc.h"
#include "delay.h"
//----------------------------------------------------------------------------
void InitSDRAM(void);
//----------------------------------------------------------------------------
void InitCoreFmc(void)
{
InitSDRAM();
}
//----------------------------------------------------------------------------
#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
//----------------------------------------------------------------------------
uint8_t SDRAM_SendCommand1(uint32_t CommandMode, uint32_t Bank, uint32_t RefreshNum, uint32_t RegVal)
{
uint32_t CommandTarget;
FMC_SDRAM_CommandTypeDef Command;
if(Bank == 1)
CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
else if(Bank == 2)
CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
else
CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1_2;
Command.CommandMode = CommandMode;
Command.CommandTarget = CommandTarget;
Command.AutoRefreshNumber = RefreshNum;
Command.ModeRegisterDefinition = RegVal;
if (HAL_SDRAM_SendCommand(&hsdram1, &Command, 0x1000) == HAL_OK)
{
return 1;
}
return 0;
}
uint8_t SDRAM_SendCommand2(uint32_t CommandMode, uint32_t Bank, uint32_t RefreshNum, uint32_t RegVal)
{
uint32_t CommandTarget;
FMC_SDRAM_CommandTypeDef Command;
if(Bank == 1)
CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
else if(Bank == 2)
CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
else
CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1_2;
Command.CommandMode = CommandMode;
Command.CommandTarget = CommandTarget;
Command.AutoRefreshNumber = RefreshNum;
Command.ModeRegisterDefinition = RegVal;
if (HAL_SDRAM_SendCommand(&hsdram2, &Command, 0x1000) == HAL_OK)
{
return 1;
}
return 0;
}
void InitSDRAM(void)
{
uint32_t temp;
// sdram1
SDRAM_SendCommand1(FMC_SDRAM_CMD_CLK_ENABLE, 1, 1, 0); //<2F><><EFBFBD><EFBFBD>3<EFBFBD><33>ʹ<EFBFBD><CAB9>ʱ<EFBFBD><CAB1><EFBFBD>źţ<C5BA>SDCKE0 = 1
DelayUs(500); //<2F><><EFBFBD><EFBFBD>4<EFBFBD><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ200us
SDRAM_SendCommand1(FMC_SDRAM_CMD_PALL, 1, 1, 0); //<2F><><EFBFBD><EFBFBD>5<EFBFBD><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB>Ԥ<EFBFBD><D4A4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SDRAM_SendCommand1(FMC_SDRAM_CMD_AUTOREFRESH_MODE, 1, 8, 0); //<2F><><EFBFBD><EFBFBD>6<EFBFBD><36><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>ˢ<EFBFBD>´<EFBFBD><C2B4><EFBFBD>
temp = SDRAM_MODEREG_BURST_LENGTH_1 | //<2F><><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD>1
SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL | //<2F><><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD>
SDRAM_MODEREG_CAS_LATENCY_3 | //<2F><><EFBFBD><EFBFBD>CASֵ<53><D6B5>3
SDRAM_MODEREG_OPERATING_MODE_STANDARD | //<2F><><EFBFBD>ò<EFBFBD><C3B2><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>׼
SDRAM_MODEREG_WRITEBURST_MODE_SINGLE; //<2F><><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB>дģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SDRAM_SendCommand1(FMC_SDRAM_CMD_LOAD_MODE, 1, 1, temp); //<2F><><EFBFBD><EFBFBD>7<EFBFBD><37>װ<EFBFBD><D7B0>ģʽ<C4A3>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
// SDRAMˢ<4D><CBA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>64ms<6D><73><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>8192<39>У<EFBFBD>ʱ<EFBFBD><CAB1>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>180MHz/2=90MHz
// <20><><EFBFBD><EFBFBD> COUNT = (64ms/8192)/(1/90us)-20 = 64000*90/8192-20 = 683
HAL_SDRAM_ProgramRefreshRate(&hsdram1, 683); //<2F><><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˢ<EFBFBD><CBA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// sdram2
SDRAM_SendCommand2(FMC_SDRAM_CMD_CLK_ENABLE, 2, 1, 0); //<2F><><EFBFBD><EFBFBD>3<EFBFBD><33>ʹ<EFBFBD><CAB9>ʱ<EFBFBD><CAB1><EFBFBD>źţ<C5BA>SDCKE0 = 1
DelayUs(500); //<2F><><EFBFBD><EFBFBD>4<EFBFBD><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ200us
SDRAM_SendCommand2(FMC_SDRAM_CMD_PALL, 2, 1, 0); //<2F><><EFBFBD><EFBFBD>5<EFBFBD><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB>Ԥ<EFBFBD><D4A4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SDRAM_SendCommand2(FMC_SDRAM_CMD_AUTOREFRESH_MODE, 2, 8, 0); //<2F><><EFBFBD><EFBFBD>6<EFBFBD><36><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>ˢ<EFBFBD>´<EFBFBD><C2B4><EFBFBD>
temp = SDRAM_MODEREG_BURST_LENGTH_1 | //<2F><><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD>1
SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL | //<2F><><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD>
SDRAM_MODEREG_CAS_LATENCY_3 | //<2F><><EFBFBD><EFBFBD>CASֵ<53><D6B5>3
SDRAM_MODEREG_OPERATING_MODE_STANDARD | //<2F><><EFBFBD>ò<EFBFBD><C3B2><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>׼
SDRAM_MODEREG_WRITEBURST_MODE_SINGLE; //<2F><><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB>дģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SDRAM_SendCommand2(FMC_SDRAM_CMD_LOAD_MODE, 2, 1, temp); //<2F><><EFBFBD><EFBFBD>7<EFBFBD><37>װ<EFBFBD><D7B0>ģʽ<C4A3>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
HAL_SDRAM_ProgramRefreshRate(&hsdram2, 683); //<2F><><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˢ<EFBFBD><CBA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
//----------------------------------------------------------------------------
// д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void FmcWriteReg(u32 wAddr, u16 data)
{
*((u16*)(wAddr)) = data;
}
// <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
u16 FmcReadReg(u32 rAddr)
{
return (*((vu16 *)(rAddr)));
}
void FmcWriteConstBuf(u32 wAddr, u16* pBuffer, u32 num)
{
// printf("FmcWriteConstBuf, addr=0x%x, len=%d\r\n", wAddr, num);
while(num != 0)
{
*((u16*)(wAddr)) = *pBuffer++;
num--;
}
}
void FmcReadConstBuf(u32 rAddr, u16* pBuffer, u32 num)
{
while(num != 0)
{
*pBuffer++ = *((vu16*)(rAddr));
num--;
}
}