/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file stm32f4xx_it.c * @brief Interrupt Service Routines. ****************************************************************************** * @attention * *

© Copyright (c) 2024 STMicroelectronics. * All rights reserved.

* * This software component is licensed by ST under BSD 3-Clause license, * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** */ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" #include "stm32f4xx_it.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ #include "trigger.h" #include "serial.h" #include "stdebug.h" #include "ethernet.h" #include "stm32motos.h" #include "embfpga.h" /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ /* USER CODE BEGIN TD */ /* USER CODE END TD */ /* Private define ------------------------------------------------------------*/ /* USER CODE BEGIN PD */ /* USER CODE END PD */ /* Private macro -------------------------------------------------------------*/ /* USER CODE BEGIN PM */ /* USER CODE END PM */ /* Private variables ---------------------------------------------------------*/ /* USER CODE BEGIN PV */ /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ /* USER CODE BEGIN PFP */ /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ /* USER CODE END 0 */ /* External variables --------------------------------------------------------*/ extern CAN_HandleTypeDef hcan1; /* USER CODE BEGIN EV */ /* USER CODE END EV */ /******************************************************************************/ /* Cortex-M4 Processor Interruption and Exception Handlers */ /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ u32 stackaddr = (__get_MSP()+0x10); OutStackInfo(4, stackaddr); /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) { } /* USER CODE END NonMaskableInt_IRQn 1 */ } /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { /* USER CODE BEGIN HardFault_IRQn 0 */ u32 stackaddr = (__get_MSP()+0x10); OutStackInfo(0, stackaddr); /* USER CODE END HardFault_IRQn 0 */ while (1) { /* USER CODE BEGIN W1_HardFault_IRQn 0 */ /* USER CODE END W1_HardFault_IRQn 0 */ } } /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { /* USER CODE BEGIN MemoryManagement_IRQn 0 */ u32 stackaddr = (__get_MSP()+0x10); OutStackInfo(1, stackaddr); /* USER CODE END MemoryManagement_IRQn 0 */ while (1) { /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ /* USER CODE END W1_MemoryManagement_IRQn 0 */ } } /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { /* USER CODE BEGIN BusFault_IRQn 0 */ u32 stackaddr = (__get_MSP()+0x10); OutStackInfo(2, stackaddr); /* USER CODE END BusFault_IRQn 0 */ while (1) { /* USER CODE BEGIN W1_BusFault_IRQn 0 */ /* USER CODE END W1_BusFault_IRQn 0 */ } } /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { /* USER CODE BEGIN UsageFault_IRQn 0 */ u32 stackaddr = (__get_MSP()+0x10); OutStackInfo(3, stackaddr); /* USER CODE END UsageFault_IRQn 0 */ while (1) { /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ /* USER CODE END W1_UsageFault_IRQn 0 */ } } /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { /* USER CODE BEGIN SVCall_IRQn 0 */ /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { /* USER CODE BEGIN DebugMonitor_IRQn 0 */ /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { /* USER CODE BEGIN PendSV_IRQn 0 */ /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ TriggerIntProc(); /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } /******************************************************************************/ /* STM32F4xx Peripheral Interrupt Handlers */ /* Add here the Interrupt Handlers for the used peripherals. */ /* For the available peripheral interrupt handler names, */ /* please refer to the startup file (startup_stm32f4xx.s). */ /******************************************************************************/ /** * @brief This function handles CAN1 TX interrupt. */ void CAN1_TX_IRQHandler(void) { /* USER CODE BEGIN CAN1_TX_IRQn 0 */ /* USER CODE END CAN1_TX_IRQn 0 */ HAL_CAN_IRQHandler(&hcan1); /* USER CODE BEGIN CAN1_TX_IRQn 1 */ /* USER CODE END CAN1_TX_IRQn 1 */ } /** * @brief This function handles CAN1 RX0 interrupt. */ void CAN1_RX0_IRQHandler(void) { /* USER CODE BEGIN CAN1_RX0_IRQn 0 */ /* USER CODE END CAN1_RX0_IRQn 0 */ HAL_CAN_IRQHandler(&hcan1); /* USER CODE BEGIN CAN1_RX0_IRQn 1 */ /* USER CODE END CAN1_RX0_IRQn 1 */ } /** * @brief This function handles EXTI line[9:5] interrupts. */ void EXTI9_5_IRQHandler(void) { /* USER CODE BEGIN EXTI9_5_IRQn 0 */ /* USER CODE END EXTI9_5_IRQn 0 */ if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_6) != RESET) { LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_6); /* USER CODE BEGIN LL_EXTI_LINE_6 */ FpgaIntProc(); // °åÔØfpgaÖÐ¶Ï /* USER CODE END LL_EXTI_LINE_6 */ } /* USER CODE BEGIN EXTI9_5_IRQn 1 */ /* USER CODE END EXTI9_5_IRQn 1 */ } /** * @brief This function handles TIM1 break interrupt and TIM9 global interrupt. */ void TIM1_BRK_TIM9_IRQHandler(void) { /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 0 */ if (LL_TIM_IsActiveFlag_UPDATE(TIM9) == 1) { LL_TIM_ClearFlag_UPDATE(TIM9); #if (STM32_MOTOS_NUM >= 1) STM32Moto1IntProc(); #endif } /* USER CODE END TIM1_BRK_TIM9_IRQn 0 */ /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 1 */ /* USER CODE END TIM1_BRK_TIM9_IRQn 1 */ } /** * @brief This function handles TIM1 update interrupt and TIM10 global interrupt. */ void TIM1_UP_TIM10_IRQHandler(void) { /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */ if (LL_TIM_IsActiveFlag_UPDATE(TIM10) == 1) { LL_TIM_ClearFlag_UPDATE(TIM10); #if (STM32_MOTOS_NUM >= 2) STM32Moto2IntProc(); #endif } /* USER CODE END TIM1_UP_TIM10_IRQn 0 */ /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */ /* USER CODE END TIM1_UP_TIM10_IRQn 1 */ } /** * @brief This function handles TIM1 trigger and commutation interrupts and TIM11 global interrupt. */ void TIM1_TRG_COM_TIM11_IRQHandler(void) { /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 0 */ if (LL_TIM_IsActiveFlag_UPDATE(TIM11) == 1) { LL_TIM_ClearFlag_UPDATE(TIM11); #if (STM32_MOTOS_NUM >= 3) STM32Moto3IntProc(); #endif } /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 0 */ /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 1 */ /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 1 */ } /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ #ifdef COMM_USART1 USART1IntProc(); #endif /* USER CODE END USART1_IRQn 0 */ /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } /** * @brief This function handles EXTI line[15:10] interrupts. */ void EXTI15_10_IRQHandler(void) { /* USER CODE BEGIN EXTI15_10_IRQn 0 */ /* USER CODE END EXTI15_10_IRQn 0 */ if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_15) != RESET) { LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_15); /* USER CODE BEGIN LL_EXTI_LINE_15 */ //EthernetIntProc(); // 5500ÖÐ¶Ï /* USER CODE END LL_EXTI_LINE_15 */ } /* USER CODE BEGIN EXTI15_10_IRQn 1 */ /* USER CODE END EXTI15_10_IRQn 1 */ } /** * @brief This function handles TIM8 break interrupt and TIM12 global interrupt. */ void TIM8_BRK_TIM12_IRQHandler(void) { /* USER CODE BEGIN TIM8_BRK_TIM12_IRQn 0 */ if (LL_TIM_IsActiveFlag_UPDATE(TIM12) == 1) { LL_TIM_ClearFlag_UPDATE(TIM12); #if (STM32_MOTOS_NUM >= 4) STM32Moto4IntProc(); #endif } /* USER CODE END TIM8_BRK_TIM12_IRQn 0 */ /* USER CODE BEGIN TIM8_BRK_TIM12_IRQn 1 */ /* USER CODE END TIM8_BRK_TIM12_IRQn 1 */ } /** * @brief This function handles TIM8 update interrupt and TIM13 global interrupt. */ void TIM8_UP_TIM13_IRQHandler(void) { /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 0 */ if (LL_TIM_IsActiveFlag_UPDATE(TIM8) == 1) { LL_TIM_ClearFlag_UPDATE(TIM8); #if (STM32_MOTOS_NUM > 0 || STM32_SOFT_PWM > 0) STM32MotoSpeedIntProc(); #endif } if (LL_TIM_IsActiveFlag_UPDATE(TIM13) == 1) { LL_TIM_ClearFlag_UPDATE(TIM13); #if (STM32_MOTOS_NUM >= 5) STM32Moto5IntProc(); #endif } /* USER CODE END TIM8_UP_TIM13_IRQn 0 */ /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 1 */ /* USER CODE END TIM8_UP_TIM13_IRQn 1 */ } /** * @brief This function handles TIM8 trigger and commutation interrupts and TIM14 global interrupt. */ void TIM8_TRG_COM_TIM14_IRQHandler(void) { /* USER CODE BEGIN TIM8_TRG_COM_TIM14_IRQn 0 */ if (LL_TIM_IsActiveFlag_UPDATE(TIM14) == 1) { LL_TIM_ClearFlag_UPDATE(TIM14); #if (STM32_MOTOS_NUM >= 6) STM32Moto6IntProc(); #endif } /* USER CODE END TIM8_TRG_COM_TIM14_IRQn 0 */ /* USER CODE BEGIN TIM8_TRG_COM_TIM14_IRQn 1 */ /* USER CODE END TIM8_TRG_COM_TIM14_IRQn 1 */ } /** * @brief This function handles USART6 global interrupt. */ void USART6_IRQHandler(void) { /* USER CODE BEGIN USART6_IRQn 0 */ #ifdef COMM_USART6 USART6IntProc(); #endif /* USER CODE END USART6_IRQn 0 */ /* USER CODE BEGIN USART6_IRQn 1 */ /* USER CODE END USART6_IRQn 1 */ } /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/