optical/EMBOS/Users/EmbBase/embfpga.c

#define	_IN_EMBFPGA_C
#include "embfpga.h"

//----------------------------------------------------------------------------

#include "corefmc.h"
#include "inout.h"
#include "shell.h"

//----------------------------------------------------------------------------

void TestFPGA(char * para1, char * para2);

//----------------------------------------------------------------------------

// <20><>ʼ<EFBFBD><CABC>FPGA
void InitEmbFpga(void)
{
	int hardver = GetFpgaHardVersion();
	printf("\r\nFPGA Hard Version = Ver %x.%x \r\n", (hardver&0xff00)>>8,(hardver&0x00ff));

	int softver = GetFpgaSoftVersion();
	printf("\r\nFPGA Soft Version = Ver %x.%x \r\n", (softver&0xff00)>>8,(softver&0x00ff));

	SetExoutEnOn();		// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>

	//AddShellCmd("FPGA", "test rw fpga", TestFPGA);

}

//----------------------------------------------------------------------------
// <20><><EFBFBD>˿<EFBFBD>

// <20><>ȡӲ<C8A1><D3B2><EFBFBD>汾
u16 GetFpgaHardVersion(void)
{
	static u16 hardver = 0;
	if ((hardver == 0) || (hardver == 0xffff))
	{// <20>ϵ<EFBFBD><CFB5><EFBFBD>ֻ<EFBFBD><D6BB>FPGA<47>ж<EFBFBD>һ<EFBFBD><D2BB>
		hardver = FmcReadReg(FPGA_HARD_VERSION);
	}
	return hardver;
}

// <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>汾
u16 GetFpgaSoftVersion(void)
{
	static u16 softver = 0;
	if ((softver == 0) || (softver == 0xffff))
	{// <20>ϵ<EFBFBD><CFB5><EFBFBD>ֻ<EFBFBD><D6BB>FPGA<47>ж<EFBFBD>һ<EFBFBD><D2BB>
		softver = FmcReadReg(FPGA_SOFT_VERSION);
	}
	return softver;
}

// <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
u16 GetRunStatus(void)
{
	SetVAxisConfig(VCTR_LOCK);		// <20><><EFBFBD><EFBFBD>
	return FmcReadReg(VAXIS_STATUS);
}

// <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
u16 GetRunStatus1(void)
{
	return FmcReadReg(VAXIS_STATUS1);
}

// <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD><CBBF>ж<EFBFBD><D0B6><EFBFBD>Ϣ
u16 GetInputIntFlags(void)
{
	return (FmcReadReg(INPUT_INT_FLAGS) & INPUT_INT_MASK);
}

// <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϣ
u16 GetEcdIntFlags(void)
{
	return (FmcReadReg(ECD_INT_FLAGS) & ECD_INT_MASK);
}

// <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5>
u32 GetVAxis1PPS(void)
{
	u32 freq;
	SetVAxisConfig(VCTR_LOCK);		// <20><><EFBFBD><EFBFBD>
	freq = FmcReadReg(CUR_VAXIS1_PPS_H);		// <20><><EFBFBD><EFBFBD>
	freq <<= 16;
	freq += FmcReadReg(CUR_VAXIS1_PPS_L);		// <20><><EFBFBD><EFBFBD>
	return freq;
}

// <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5>
// vaxisId: VAXIS_ID1
u32 GetVAxisPPS(u16 vaxisId)
{
	assert_param(IS_VAXIS_ID(vaxisId));

	switch (vaxisId)
	{
	case VAXIS_ID1:
		return GetVAxis1PPS();
	default:
		return 0;
	}
}

// <20><>ȡ<EFBFBD><C8A1>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5>
u32 GetLastVAxisFrequency(u16 vaxisId)
{
	u32 freq;
	assert_param(vaxisId == VAXIS_ID1);

	if (vaxisId == VAXIS_ID1)
	{
		freq = FmcReadReg(VAXIS1_END_FREQUENCY_H);		// <20><><EFBFBD><EFBFBD>
		freq <<= 16;
		freq += FmcReadReg(VAXIS1_END_FREQUENCY_L);	// <20><><EFBFBD><EFBFBD>
	}
	else
	{
		freq = 0;
	}

	return freq;
}

// <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>1<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>ֵ
u32 GetVAxis1Counter(void)
{
	u32 Counter;
	SetVAxisConfig(VCTR_LOCK);			// <20><><EFBFBD><EFBFBD>
	Counter = FmcReadReg(CUR_VAXIS1_COUNTER_H);		// <20><><EFBFBD><EFBFBD>
	Counter <<= 16;
	Counter += FmcReadReg(CUR_VAXIS1_COUNTER_L);	// <20><><EFBFBD><EFBFBD>
	return Counter;
}

// <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>ֵ
// vaxisId: VAXIS_ID1
u32 GetVAxisCounter(u16 vaxisId)
{
	assert_param(IS_VAXIS_ID(vaxisId));

	switch (vaxisId)
	{
	case VAXIS_ID1:
		return GetVAxis1Counter();
	default:
		return 0;
	}
}

// <20><>ȡʵ<C8A1><CAB5>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
s32 GetAxis1Counter(void)
{
	s32 Counter;
	SetVAxisConfig(VCTR_LOCK);			// <20><><EFBFBD><EFBFBD>
	Counter = FmcReadReg(CUR_AXIS1_COUNTER_H);		// <20><><EFBFBD><EFBFBD>
	Counter <<= 16;
	Counter += FmcReadReg(CUR_AXIS1_COUNTER_L);	// <20><><EFBFBD><EFBFBD>
	return Counter;
}

// <20><>ȡʵ<C8A1><CAB5>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
s32 GetAxis2Counter(void)
{
	s32 Counter;
	SetVAxisConfig(VCTR_LOCK);			// <20><><EFBFBD><EFBFBD>
	Counter = FmcReadReg(CUR_AXIS2_COUNTER_H);		// <20><><EFBFBD><EFBFBD>
	Counter <<= 16;
	Counter += FmcReadReg(CUR_AXIS2_COUNTER_L);	// <20><><EFBFBD><EFBFBD>
	return Counter;
}

// <20><>ȡʵ<C8A1><CAB5>3<EFBFBD><33><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
s32 GetAxis3Counter(void)
{
	s32 Counter;
	SetVAxisConfig(VCTR_LOCK);			// <20><><EFBFBD><EFBFBD>
	Counter = FmcReadReg(CUR_AXIS3_COUNTER_H);		// <20><><EFBFBD><EFBFBD>
	Counter <<= 16;
	Counter += FmcReadReg(CUR_AXIS3_COUNTER_L);	// <20><><EFBFBD><EFBFBD>
	return Counter;
}

// <20><>ȡʵ<C8A1><CAB5>4<EFBFBD><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
s32 GetAxis4Counter(void)
{
	s32 Counter;
	SetVAxisConfig(VCTR_LOCK);			// <20><><EFBFBD><EFBFBD>
	Counter = FmcReadReg(CUR_AXIS4_COUNTER_H);		// <20><><EFBFBD><EFBFBD>
	Counter <<= 16;
	Counter += FmcReadReg(CUR_AXIS4_COUNTER_L);	// <20><><EFBFBD><EFBFBD>
	return Counter;
}

// <20><>ȡʵ<C8A1><CAB5>5<EFBFBD><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
s32 GetAxis5Counter(void)
{
	s32 Counter;
	SetVAxisConfig(VCTR_LOCK);			// <20><><EFBFBD><EFBFBD>
	Counter = FmcReadReg(CUR_AXIS5_COUNTER_H);		// <20><><EFBFBD><EFBFBD>
	Counter <<= 16;
	Counter += FmcReadReg(CUR_AXIS5_COUNTER_L);	// <20><><EFBFBD><EFBFBD>
	return Counter;
}

// <20><>ȡʵ<C8A1><CAB5>6<EFBFBD><36><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
s32 GetAxis6Counter(void)
{
	s32 Counter;
	SetVAxisConfig(VCTR_LOCK);			// <20><><EFBFBD><EFBFBD>
	Counter = FmcReadReg(CUR_AXIS6_COUNTER_H);		// <20><><EFBFBD><EFBFBD>
	Counter <<= 16;
	Counter += FmcReadReg(CUR_AXIS6_COUNTER_L);	// <20><><EFBFBD><EFBFBD>
	return Counter;
}

// <20><>ȡʵ<C8A1><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
// axisId: AXIS_ID1 ~ AXIS_ID6
s32 GetAxisCounter(u16 axisId)
{
	assert_param(IS_AXIS_ID(axisId));

	switch (axisId)
	{
	case AXIS_ID1:
		return GetAxis1Counter();
	case AXIS_ID2:
		return GetAxis2Counter();
	case AXIS_ID3:
		return GetAxis3Counter();
	case AXIS_ID4:
		return GetAxis4Counter();
	case AXIS_ID5:
		return GetAxis5Counter();
	case AXIS_ID6:
		return GetAxis6Counter();
	default:
		return -1;
	}
}

// <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>ֵ
s32 GetEcd1Value(void)
{
	s32 Counter;
	SetVAxisConfig(VCTR_LOCK);			// <20><><EFBFBD><EFBFBD>
	Counter = FmcReadReg(CUR_ECD1_COUNTER_H);		// <20><><EFBFBD><EFBFBD>
	Counter <<= 16;
	Counter += FmcReadReg(CUR_ECD1_COUNTER_L);		// <20><><EFBFBD><EFBFBD>
	return Counter;
}

// <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD>ֵ
s32 GetEcd2Value(void)
{
	s32 Counter;
	SetVAxisConfig(VCTR_LOCK);			// <20><><EFBFBD><EFBFBD>
	Counter = FmcReadReg(CUR_ECD2_COUNTER_H);		// <20><><EFBFBD><EFBFBD>
	Counter <<= 16;
	Counter += FmcReadReg(CUR_ECD2_COUNTER_L);		// <20><><EFBFBD><EFBFBD>
	return Counter;
}

// <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
// ecdId: ECD_SEL1 ~ ECD_SEL2
s32 GetEcdCounter(u16 ecdId)
{
	assert_param(IS_ECD_SEL(ecdId));

	switch (ecdId)
	{
	case ECD_SEL1:
		return GetEcd1Value();
	case ECD_SEL2:
		return GetEcd2Value();
	default:
		return -1;
	}
}

// <20><>ȡOP<4F><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
u32 GetOPCounter(void)
{
	u32 Counter;
	SetVAxisConfig(VCTR_LOCK);	// <20><><EFBFBD><EFBFBD>
	Counter = FmcReadReg(CUR_OP_COUNTER_H);		// <20><><EFBFBD><EFBFBD>
	Counter <<= 16;
	Counter += FmcReadReg(CUR_OP_COUNTER_L);		// <20><><EFBFBD><EFBFBD>
	return Counter;
}

// <20><>ȡZP<5A><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
u32 GetZPCounter(void)
{
	u32 Counter;
	SetVAxisConfig(VCTR_LOCK);	// <20><><EFBFBD><EFBFBD>
	Counter = FmcReadReg(CUR_ZP_COUNTER_H);		// <20><><EFBFBD><EFBFBD>
	Counter <<= 16;
	Counter += FmcReadReg(CUR_ZP_COUNTER_L);		// <20><><EFBFBD><EFBFBD>
	return Counter;
}

// <20>õ<EFBFBD>ʵ<EFBFBD>ᱨ<EFBFBD><E1B1A8><EFBFBD><EFBFBD>Ϣ
u16 GetAlarmValue(void)
{
	return (FmcReadReg(AXIS_ALM_STATUS) & AXIS_ALM_MASK);
}

// <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>״̬
u16 GetEcdStatus(void)
{
	return (FmcReadReg(ECD_SIGNAL_STATUS) & ECD_STA_MASK);
}

// <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD>״̬
u16 GetInputStatus(void)
{
	return (FmcReadReg(INPUT_STATUS));
}

//----------------------------------------------------------------------------
// д<>˿<EFBFBD>
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void SetVAxisConfig(u16 cfg)
{
	assert_param(IS_VAXIS_CMD(cfg));

	FmcWriteReg(VAXIS_CONTROL, cfg);
}

// <20><><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD>FPGA<47>ж<EFBFBD>
void CleanAllIntFlag(void)
{
	SetVAxisConfig(VCTR_INPUT_ALM_INT);		// <20><><EFBFBD><EFBFBD>input<75>жϱ<D0B6>־
	SetVAxisConfig(VCTR_ZP1_INT);			// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1:<3A><><EFBFBD><EFBFBD>ZP1<50>жϱ<D0B6>־
	SetVAxisConfig(VCTR_ZP2_INT);			// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2:<3A><><EFBFBD><EFBFBD>ZP1<50>жϱ<D0B6>־

	SetVAxisConfig(VCTR_VAXIS1_CLEAN_OV1);	// <20><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
	SetVAxisConfig(VCTR_VAXIS1_CLEAN_OV2);	// <20><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
}

// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˶<EFBFBD>
int StartVAxisRun(VAxisCmdStr * pCmd)
{
	u32 addr;

	if (pCmd == NULL)
	{
		return -1;
	}

	assert_param(IS_VAXIS_ID(pCmd->vaxisId));
	assert_param(IS_BUF_SEL(pCmd->bufSel));

	if (pCmd->vaxisId == VAXIS_ID1)		// <20><><EFBFBD><EFBFBD>1
	{
		if (pCmd->bufSel == BUF_SEL1)
		{
			SetVAxisConfig(VCTR_VAXIS1_DIS_BUF1);
			addr = VAXIS1_BUF1_PARA;
		}
		else if (pCmd->bufSel == BUF_SEL2)
		{
			SetVAxisConfig(VCTR_VAXIS1_DIS_BUF2);
			addr = VAXIS1_BUF2_PARA;
		}
		else if (pCmd->bufSel == BUF_SEL3)
		{
			SetVAxisConfig(VCTR_VAXIS1_DIS_BUF3);
			addr = VAXIS1_BUF3_PARA;
		}
		else
		{
			return -1;
		}
	}
	else
	{
		return -1;
	}

	if ((pCmd->vaxisId == VAXIS_ID1) ||		// <20><><EFBFBD><EFBFBD>1
			0	)
	{
		if (pCmd->calcGap > MAX_GAP)
		{
//			printf("calcGap=%d > MAX_GAP\r\n", pCmd->calcGap);
			pCmd->calcGap = MAX_GAP;
		}
		else if (pCmd->calcGap < MIN_GAP)
		{
//			printf("calcGap=%d < MIN_GAP\r\n", pCmd->calcGap);
			pCmd->calcGap = MIN_GAP;
		}

		if (pCmd->startPPS > MAX_PPS)
		{
			printf("startPPS=%d > MAX_PPS\r\n", pCmd->startPPS);
			pCmd->startPPS = MAX_PPS;
		}
		else if (pCmd->startPPS < MIN_PPS)
		{
			printf("startPPS=%d < MIN_PPS\r\n", pCmd->startPPS);
			pCmd->startPPS = MIN_PPS;
			return -1;		// <20>޸ķ<DEB8>ֹ<EFBFBD>˶<EFBFBD>̫<EFBFBD><CCAB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
		}

		if (pCmd->runPPS > MAX_PPS)
		{
			printf("runPPS=%d > MAX_PPS\r\n", pCmd->runPPS);
			pCmd->runPPS = MAX_PPS;
		}
		else if (pCmd->runPPS < MIN_PPS)
		{
			printf("runPPS=%d < MIN_PPS\r\n", pCmd->runPPS);
			pCmd->runPPS = MIN_PPS;
			return -1;		// <20>޸ķ<DEB8>ֹ<EFBFBD>˶<EFBFBD>̫<EFBFBD><CCAB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
		}

		FmcWriteReg(addr, LOWORD(pCmd->calcGap));
		FmcWriteReg(addr, HIWORD(pCmd->calcGap));		// <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1/72 us Ϊ<><CEAA>λ
		FmcWriteReg(addr, LOWORD(pCmd->startPPS));
		FmcWriteReg(addr, HIWORD(pCmd->startPPS));		// <20><><EFBFBD><EFBFBD>Ƶ<EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD>λpps
		FmcWriteReg(addr, LOWORD(pCmd->runPPS));
		FmcWriteReg(addr, HIWORD(pCmd->runPPS));		// Ŀ<><C4BF>Ƶ<EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD>λpps

		if (pCmd->bufSel != BUF_SEL3)
		{
			assert_param(pCmd->outNum <= MAX_OUTNUM);
			assert_param(pCmd->outNum >= MIN_OUTNUM);
			assert_param(pCmd->jumpNum <= MAX_OUTNUM);

			FmcWriteReg(addr, LOWORD(pCmd->outNum));
			FmcWriteReg(addr, HIWORD(pCmd->outNum));	// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>
			FmcWriteReg(addr, LOWORD(pCmd->jumpNum));
			FmcWriteReg(addr, HIWORD(pCmd->jumpNum));	// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
			FmcWriteReg(addr, VOK_FLAG);				// OK
		}
		else
		{
			FmcWriteReg(addr, VOK_FLAG);
		}

		// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
		if (pCmd->vaxisId == VAXIS_ID1)
		{
//			printf("vaxis 1 run cmd\r\n");
			SetVAxisConfig(VCTR_VAXIS1_RUN);
		}
		else
		{
		}
	}
	else
	{
		return -1;
	}

	return 0;
}


// <20><><EFBFBD><EFBFBD>:ֹͣ<CDA3><D6B9>ǰ<EFBFBD>˶<EFBFBD>
int StopVAxisRun(u16 vaxisId)
{
	assert_param(IS_VAXIS_ID(vaxisId));

	//<2F><><EFBFBD><EFBFBD>ֹͣ
	if (vaxisId == VAXIS_ID1 || vaxisId == VAXIS_ID_ALL)
	{
		SetVAxisConfig(VCTR_VAXIS1_STOP);
		SetVAxisConfig(VCTR_VAXIS1_CLEAN_OV1);
		SetVAxisConfig(VCTR_VAXIS1_CLEAN_OV2);
		SetVAxisConfig(VCTR_VAXIS1_DIS_BUF1);
		SetVAxisConfig(VCTR_VAXIS1_DIS_BUF2);
		SetVAxisConfig(VCTR_VAXIS1_DIS_BUF3);
	}

	return 0;
}

// <20><><EFBFBD><EFBFBD>:<3A>ٶȽ<D9B6><C8BD><EFBFBD><EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
void StopSpdCtrl(u16 vaxisId)
{
	assert_param(IS_VAXIS_ID(vaxisId));

	if (vaxisId == VAXIS_ID1 || vaxisId == VAXIS_ID_ALL)
	{
		SetVAxisConfig(VCTR_VAXIS1_DIS_BUF3);
	}
}

// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>
// ecdId: ECD_SEL1 ~ ECD_SEL2
void ClearEcdCounter(u16 ecdId)
{
	assert_param(IS_ECD_SEL(ecdId));

	switch (ecdId)
	{
	case ECD_SEL1:
		SetVAxisConfig(VCTR_ECD1_CLEAR);
		break;
	case ECD_SEL2:
		SetVAxisConfig(VCTR_ECD2_CLEAR);
		break;
	default:
		break;
	}
}

void ReetEcdABZLevel(u16 ecdId)
{
	switch (ecdId)
	{
	case ECD_SEL1:
		SetVAxisConfig(VCTR_ECD1_LEVEL_RST);
		break;
	case ECD_SEL2:
		SetVAxisConfig(VCTR_ECD1_LEVEL_RST);
		break;
	default:
		break;
	}
}

void SetEcdAPLevelNegative(u16 ecdId)
{
	switch (ecdId)
	{
	case ECD_SEL1:
		SetVAxisConfig(VCTR_AP1_LEVEL_NEG);
		break;
	case ECD_SEL2:
		SetVAxisConfig(VCTR_AP2_LEVEL_NEG);
		break;
	default:
		break;
	}
}

void SetEcdAZLevelNegative(u16 ecdId)
{
	switch (ecdId)
	{
	case ECD_SEL1:
		SetVAxisConfig(VCTR_AZ1_LEVEL_NEG);
		break;
	case ECD_SEL2:
		SetVAxisConfig(VCTR_AZ2_LEVEL_NEG);
		break;
	default:
		break;
	}
}

void SetEcdZPLevelNegative(u16 ecdId)
{
	switch (ecdId)
	{
	case ECD_SEL1:
		SetVAxisConfig(VCTR_ZP1_LEVEL_NEG);
		break;
	case ECD_SEL2:
		SetVAxisConfig(VCTR_ZP2_LEVEL_NEG);
		break;
	default:
		break;
	}
}

// OP<4F><50><EFBFBD><EFBFBD>
void SetOpOutOn(void)
{
	SetVAxisConfig(VCTR_OPOS_ON);
}

void SetOpOutOff(void)
{
	SetVAxisConfig(VCTR_OPOS_NONE);
}

void SetZpOutOn(void)
{
	SetVAxisConfig(VCTR_ZPOS_ON);
}

void SetZpOutOff(void)
{
	SetVAxisConfig(VCTR_ZPOS_NONE);
}

// <20><><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void SetAxisAlarmConfig(u16 axisId, u16 alm)
{
	assert_param(IS_AXIS_ID(axisId));

	SetVAxisConfig(MAKE_VCTR_AXIS_ALM_CMD(axisId,alm));
}

//--------------------------------------------------------------------------------------------------------------

// <20><><EFBFBD><EFBFBD>OP<4F><50><EFBFBD><EFBFBD><EFBFBD>ķ<EFBFBD>Ƶϵ<C6B5><CFB5>
void SetOpDivision(u16 div)
{
	if (div != OP_OUT_DIRECT)
	{
		div &= 0xFFFE;
	}
	FmcWriteReg(OP_OUT_DIVISION, div);
}

// <20><><EFBFBD><EFBFBD>OP<4F><50><EFBFBD><EFBFBD>ֵ
void SetOpCounter(s32 cnt)
{
	FmcWriteReg(OP_COUNTER_SET_L, LOWORD(cnt));
	FmcWriteReg(OP_COUNTER_SET_H, HIWORD(cnt));
}

// <20><><EFBFBD><EFBFBD>ZP<5A><50><EFBFBD><EFBFBD>ֵ
void SetZpCounter(s32 cnt)
{
	FmcWriteReg(ZP_COUNTER_SET_L, LOWORD(cnt));
	FmcWriteReg(ZP_COUNTER_SET_H, HIWORD(cnt));
}

void SetEcd1Counter(s32 cnt)
{
	FmcWriteReg(ECD1_COUNTER_SET_L, LOWORD(cnt));
	FmcWriteReg(ECD1_COUNTER_SET_H, HIWORD(cnt));
}

void SetEcd2Counter(s32 cnt)
{
	FmcWriteReg(ECD2_COUNTER_SET_L, LOWORD(cnt));
	FmcWriteReg(ECD2_COUNTER_SET_H, HIWORD(cnt));
}

// <20><><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
void SetEcdCounter(u16 ecdId, s32 cnt)
{
	assert_param(IS_ECD_SEL(ecdId));

	switch(ecdId)
	{
		case ECD_SEL1:
		{
			SetEcd1Counter(cnt);
			break;
		}
		case ECD_SEL2:
		{
			SetEcd2Counter(cnt);
			break;
		}
		default:
			break;
	}
}

// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD><CBBF>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
void SetInputInt(u16 cfg)
{
	FmcWriteReg(INPUT_INT_SET, cfg);
}

#define MAX_OUTPUT_NUM			8

u16 g_outputValue = 0;

void Output1On(void)
{
	g_outputValue |= OUTPUT1_BIT;
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output1Off(void)
{
	g_outputValue &= (~OUTPUT1_BIT);
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output2On(void)
{
	g_outputValue |= OUTPUT2_BIT;
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output2Off(void)
{
	g_outputValue &= (~OUTPUT2_BIT);
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output3On(void)
{
	g_outputValue |= OUTPUT3_BIT;
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output3Off(void)
{
	g_outputValue &= (~OUTPUT3_BIT);
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output4On(void)
{
	g_outputValue |= OUTPUT4_BIT;
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output4Off(void)
{
	g_outputValue &= (~OUTPUT4_BIT);
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output5On(void)
{
	g_outputValue |= OUTPUT5_BIT;
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output5Off(void)
{
	g_outputValue &= (~OUTPUT5_BIT);
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output6On(void)
{
	g_outputValue |= OUTPUT6_BIT;
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output6Off(void)
{
	g_outputValue &= (~OUTPUT6_BIT);
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output7On(void)
{
	g_outputValue |= OUTPUT7_BIT;
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output7Off(void)
{
	g_outputValue &= (~OUTPUT7_BIT);
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output8On(void)
{
	g_outputValue |= OUTPUT8_BIT;
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

void Output8Off(void)
{
	g_outputValue &= (~OUTPUT8_BIT);
	FmcWriteReg(OUTPUT_SET, g_outputValue);
}

// <20>õ<EFBFBD>ij<EFBFBD><C4B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
u8 GetOutputVal(int num)
{
	if (num > 0 && num <= MAX_OUTPUT_NUM)
	{
		u16 mod = 0x01;
		mod <<= (num-1);
		if ((g_outputValue & mod) != 0)
		{
			return SENSOR_ON;
		}
		else
		{
			return SENSOR_OFF;
		}
	}

	return SENSOR_OFF;
}

//-------------------------------------------------------------

// <20><><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void SetAxisConfig(u16 axisId, u16 cfg)
{
	assert_param(IS_AXIS_ID(axisId));
	assert_param(IS_AXIS_CMD(cfg));

	FmcWriteReg(AXIS_CONFIG(AXIS(axisId)), cfg);
}

u32 GetSineNums(u16 sineout, u16* pBuffer, u32 num)
{
	u32 sinenum, temp;
	sinenum = 0;

	if (sineout != 0)
	{
		while(num != 0)
		{
			temp = (*pBuffer) & 0x7fff;
			sinenum += temp;

			//temp = (u32)(temp * SINE_MUTI + 0.5);
			temp = (u32)(temp * SINE_MUTI + 0.999f);	// 20220407 ljs <20><>˧ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>޸<EFBFBD>,<2C>޸<EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
			if (temp > 0x7fff)
			{
				printf("sine calc error\r\n");
				sinenum += 0x100000;	// <20><><EFBFBD>ش<EFBFBD><D8B4><EFBFBD> 0xfffff <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ա<EFBFBD><D4B1>ڵ<EFBFBD><DAB5>ú<EFBFBD><C3BA><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
			}

			*pBuffer &= 0x8000;
			*pBuffer |= (temp & 0x7fff);

			num--;
			pBuffer++;
		}
	}

	return sinenum;
}

// д<>岹<EFBFBD><E5B2B9><EFBFBD><EFBFBD>
// <20><><EFBFBD><EFBFBD>ֵ: 0:<3A><><EFBFBD><EFBFBD>
//		-1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//		-2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
//		-3<><33>fpga <20><>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
// 		-4<><34>FPGA <20>汾<EFBFBD><E6B1BE><EFBFBD><EFBFBD>
int WriteInterData(InterData * pCmd)
{
	u32 sineNum;

	if (pCmd == NULL)
	{
		printf("para is empty in WriteInterData\r\n");
		return -1;
	}

	assert_param(IS_VAXIS_ID(pCmd->vaxisId));
	assert_param(IS_AXIS_ID(pCmd->axisId));
	assert_param(IS_BUF_SEL(pCmd->bufSel));

	assert_param(pCmd->datBufLen < MAX_SEGMENT_PER_BUF);
	assert_param(pCmd->datBufLen > 0);
	assert_param(pCmd->startEscNum <= MAX_OUTNUM);
	assert_param(pCmd->partVxNum <= MAX_OUTNUM);
	assert_param(pCmd->partVxNum >= MIN_OUTNUM);

	// ѡ<><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
	switch (pCmd->vaxisId)
	{
	case VAXIS_ID1:
		SetAxisConfig((pCmd->axisId), POUT_ENABLE_VAXIS1); 	// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>1
		break;
	case VAXIS_ECD:
		SetAxisConfig((pCmd->axisId), POUT_ENABLE_ECD); 	// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿ<EFBFBD>
		break;
	default:
		SetAxisConfig((pCmd->axisId), POUT_DISABLE); 		// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD><D6B9>
		break;
	}

	sineNum = GetSineNums(pCmd->sineOut, pCmd->datBuff, pCmd->datBufLen);

	// <20><><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
	if (pCmd->bufSel == BUF_SEL1)
	{
//		printf("\r\nwrite buff 1\r\n");
		SetAxisConfig((pCmd->axisId), DIS_INTER_BUF1); 	// <20><><EFBFBD>ձ<EFBFBD>

		// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
		FmcWriteReg(AXIS_BUF1_SINE_OUT(AXIS(pCmd->axisId)), (u16)(sineNum & 0xffff));		// д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>λ
		FmcWriteReg(AXIS_BUF1_SINE_OUT_H(AXIS(pCmd->axisId)), (u16)(sineNum>>16));			// д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD>λ

		FmcWriteConstBuf(INTER_BUF1_DATA(AXIS(pCmd->axisId)), pCmd->datBuff, pCmd->datBufLen);	// д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
		FmcWriteReg(INTER_BUF1_PARA(AXIS(pCmd->axisId)), LOWORD(pCmd->startEscNum));	// <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
		FmcWriteReg(INTER_BUF1_PARA(AXIS(pCmd->axisId)), HIWORD(pCmd->startEscNum));
		FmcWriteReg(INTER_BUF1_PARA(AXIS(pCmd->axisId)), LOWORD(pCmd->partVxNum));		// ÿ<>ζ<EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
		FmcWriteReg(INTER_BUF1_PARA(AXIS(pCmd->axisId)), HIWORD(pCmd->partVxNum));
		FmcWriteReg(INTER_BUF1_PARA(AXIS(pCmd->axisId)), LOWORD(pCmd->dirAttr));		// ʵ<><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
		FmcWriteReg(INTER_BUF1_PARA(AXIS(pCmd->axisId)), HIWORD(pCmd->dirAttr));
		FmcWriteReg(INTER_BUF1_PARA(AXIS(pCmd->axisId)), VOK_FLAG);
	}
	else if (pCmd->bufSel == BUF_SEL2)
	{
//		printf("\r\nwrite buff 2\r\n");
		SetAxisConfig((pCmd->axisId), DIS_INTER_BUF2); 	// <20><><EFBFBD>ձ<EFBFBD>

		// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
		FmcWriteReg(AXIS_BUF2_SINE_OUT(AXIS(pCmd->axisId)), (u16)(sineNum & 0xffff));			// д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>λ
		FmcWriteReg(AXIS_BUF2_SINE_OUT_H(AXIS(pCmd->axisId)), (u16)(sineNum>>16));			// д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD>λ

		FmcWriteConstBuf(INTER_BUF2_DATA(AXIS(pCmd->axisId)), pCmd->datBuff, pCmd->datBufLen);	// д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
		FmcWriteReg(INTER_BUF2_PARA(AXIS(pCmd->axisId)), LOWORD(pCmd->startEscNum));	// <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
		FmcWriteReg(INTER_BUF2_PARA(AXIS(pCmd->axisId)), HIWORD(pCmd->startEscNum));
		FmcWriteReg(INTER_BUF2_PARA(AXIS(pCmd->axisId)), LOWORD(pCmd->partVxNum));		// ÿ<><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
		FmcWriteReg(INTER_BUF2_PARA(AXIS(pCmd->axisId)), HIWORD(pCmd->partVxNum));
		FmcWriteReg(INTER_BUF2_PARA(AXIS(pCmd->axisId)), LOWORD(pCmd->dirAttr));		// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
		FmcWriteReg(INTER_BUF2_PARA(AXIS(pCmd->axisId)), HIWORD(pCmd->dirAttr));
		FmcWriteReg(INTER_BUF2_PARA(AXIS(pCmd->axisId)), VOK_FLAG);
	}
	else
	{
		printf("bufSel = %d, error\r\n", pCmd->bufSel);
		return -1;
	}

	return 0;
}

void CleanAxisBuff(u16 axisId, u16 bufSel)
{
	assert_param(IS_AXIS_ID(axisId));
	assert_param(IS_BUF_SEL(bufSel));

	if (bufSel == BUF_SEL1)
	{
//		printf("clean axis %d buff 1\r\n", axisId);
		SetAxisConfig(axisId, DIS_INTER_BUF1); 	// <20><><EFBFBD>ձ<EFBFBD>
		FmcWriteConstBuf(INTER_BUF1_DATA(AXIS(axisId)), NULL, 0);	// д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
	}
	else if (bufSel == BUF_SEL2)
	{
//		printf("clean axis %d buff 2\r\n", axisId);
		SetAxisConfig(axisId, DIS_INTER_BUF2); 	// <20><><EFBFBD>ձ<EFBFBD>
		FmcWriteConstBuf(INTER_BUF2_DATA(AXIS(axisId)), NULL, 0);	// д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
	}
}

// <20><><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
void SetAxisCounter(u16 axisId, s32 cnt)
{
	assert_param(IS_AXIS_ID(axisId));

	FmcWriteReg(AXIS_COUNTER_L(AXIS(axisId)), LOWORD(cnt));
	FmcWriteReg(AXIS_COUNTER_H(AXIS(axisId)), HIWORD(cnt));
}

// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM<57><4D>Ƶϵ<C6B5><CFB5>
void SetAxisPwmFreq(u16 axisId, u16 freq)
{
	assert_param(IS_AXIS_PWM_ID(axisId));
	assert_param(IS_AXIS_PWM_FREQ(freq));

	FmcWriteReg(AXIS_PWM_FREQ(AXIS(axisId)), freq);
}

// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PULSE<53><45>PWMֵ
void SetAxisPulsePwm(u16 axisId, u16 val)
{
	if (val > FPGA_PWM_MAX_VAL)
	{
		val = FPGA_PWM_MAX_VAL;
	}
	assert_param(IS_AXIS_PWM_ID(axisId));
	assert_param(IS_AXIS_PWM_VAL(val));

	FmcWriteReg(AXIS_PULSE_PWM(AXIS(axisId)), val);
}

// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SIGN<47><4E>PWMֵ
void SetAxisSignPwm(u16 axisId, u16 val)
{
	if (val > FPGA_PWM_MAX_VAL)
	{
		val = FPGA_PWM_MAX_VAL;
	}
	assert_param(IS_AXIS_PWM_ID(axisId));
	assert_param(IS_AXIS_PWM_VAL(val));

	FmcWriteReg(AXIS_SIGN_PWM(AXIS(axisId)), val);
}

//--------------------------------------------------------------------

typedef void (*InputIntProc)(void);

InputIntProc g_inputIntProcAry[16] = {NULL};

void RegInputIntProc(u16 intcfg, void(*inputProc)(void))
{
	static u16 intconfig = 0;
	if (intcfg == INPUT1_INT_EN)
	{
		g_inputIntProcAry[0] = inputProc;
	}
	else if (intcfg == INPUT2_INT_EN)
	{
		g_inputIntProcAry[1] = inputProc;
	}
	else if (intcfg == INPUT3_INT_EN)
	{
		g_inputIntProcAry[2] = inputProc;
	}
	else if (intcfg == INPUT4_INT_EN)
	{
		g_inputIntProcAry[3] = inputProc;
	}
	else if (intcfg == INPUT5_INT_EN)
	{
		g_inputIntProcAry[4] = inputProc;
	}
	else if (intcfg == INPUT6_INT_EN)
	{
		g_inputIntProcAry[5] = inputProc;
	}
	else if (intcfg == INPUT7_INT_EN)
	{
		g_inputIntProcAry[6] = inputProc;
	}
	else if (intcfg == INPUT8_INT_EN)
	{
		g_inputIntProcAry[7] = inputProc;
	}
	else if (intcfg == INPUT9_INT_EN)
	{
		g_inputIntProcAry[8] = inputProc;
	}
	else if (intcfg == INPUT10_INT_EN)
	{
		g_inputIntProcAry[9] = inputProc;
	}
	else if (intcfg == INPUT11_INT_EN)
	{
		g_inputIntProcAry[10] = inputProc;
	}
	else if (intcfg == INPUT12_INT_EN)
	{
		g_inputIntProcAry[11] = inputProc;
	}
	else if (intcfg == INPUT13_INT_EN)
	{
		g_inputIntProcAry[12] = inputProc;
	}
	else if (intcfg == INPUT14_INT_EN)
	{
		g_inputIntProcAry[13] = inputProc;
	}
	else if (intcfg == INPUT15_INT_EN)
	{
		g_inputIntProcAry[14] = inputProc;
	}
	else if (intcfg == INPUT16_INT_EN)
	{
		g_inputIntProcAry[15] = inputProc;
	}

	intconfig |= intcfg;
	SetInputInt(intconfig);
}

InputIntProc g_ecdIntProcAry[2] = {NULL};

void RegEcdInputProc(u16 ecdId, void(*ecdProc)(void))
{
	assert_param(IS_ECD_SEL(ecdId));

	if (ecdId == ECD_SEL1)
	{
		g_ecdIntProcAry[0] = ecdProc;
	}
	else if (ecdId == ECD_SEL2)
	{
		g_ecdIntProcAry[1] = ecdProc;
	}
}

// <20>ⲿ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>
void FpgaIntProc(void)
{
	u16 tmp16;
	{
		tmp16 = GetRunStatus();		// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬

		if ((tmp16 & INPUT_ALARM_FLAG) != 0)		// <20><><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD><C5BA>½<EFBFBD><C2BD><EFBFBD><EFBFBD>ж<EFBFBD>
		{
			//printf("Get input int, GetRunStatus=0x%x, ", tmp16);
			tmp16 = GetInputIntFlags();
			//printf("GetInputIntFlags=0x%x\r\n", tmp16);

			SetVAxisConfig(VCTR_INPUT_ALM_INT);		// <20><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־

			if ((tmp16 & INPUT01_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[0] != NULL)
				{
					g_inputIntProcAry[0]();
				}
			}
			if ((tmp16 & INPUT02_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[1] != NULL)
				{
					g_inputIntProcAry[1]();
				}			
			}
			if ((tmp16 & INPUT03_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[2] != NULL)
				{
					g_inputIntProcAry[2]();
				}
			}
			if ((tmp16 & INPUT04_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[3] != NULL)
				{
					g_inputIntProcAry[3]();
				}
			}
			if ((tmp16 & INPUT05_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[4] != NULL)
				{
					g_inputIntProcAry[4]();
				}
			}
			if ((tmp16 & INPUT06_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[5] != NULL)
				{
					g_inputIntProcAry[5]();
				}
			}
			if ((tmp16 & INPUT07_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[6] != NULL)
				{
					g_inputIntProcAry[6]();
				}
			}
			if ((tmp16 & INPUT08_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[7] != NULL)
				{
					g_inputIntProcAry[7]();
				}
			}
			if ((tmp16 & INPUT09_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[8] != NULL)
				{
					g_inputIntProcAry[8]();
				}
			}
			if ((tmp16 & INPUT10_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[9] != NULL)
				{
					g_inputIntProcAry[9]();
				}
			}
			if ((tmp16 & INPUT11_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[10] != NULL)
				{
					g_inputIntProcAry[10]();
				}
			}
			if ((tmp16 & INPUT12_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[11] != NULL)
				{
					g_inputIntProcAry[11]();
				}
			}
			if ((tmp16 & INPUT13_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[12] != NULL)
				{
					g_inputIntProcAry[12]();
				}
			}
			if ((tmp16 & INPUT14_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[13] != NULL)
				{
					g_inputIntProcAry[13]();
				}
			}
			if ((tmp16 & INPUT15_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[14] != NULL)
				{
					g_inputIntProcAry[14]();
				}
			}
			if ((tmp16 & INPUT16_INT_FLAG) != 0)
			{
				if (g_inputIntProcAry[15] != NULL)
				{
					g_inputIntProcAry[15]();
				}
			}
		}

		if ((tmp16 & ENCODER_ALARM_FLAG) != 0)		// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ZP<5A>ź<EFBFBD><C5BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
		{
			//printf("Get zp int, GetRunStatus=0x%x, ", tmp16);
			tmp16 = GetEcdIntFlags();
			//printf("GetInputIntFlags=0x%x\r\n", tmp16);

			if ((tmp16 & ECD1ZP_INT_FLAG) != 0)
			{
				SetVAxisConfig(VCTR_ZP1_INT);		// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1 ZP <20>жϱ<D0B6>־

				if (g_ecdIntProcAry[0] != NULL)
				{
					g_ecdIntProcAry[0]();
				}
			}

			if ((tmp16 & ECD2ZP_INT_FLAG) != 0)
			{
				SetVAxisConfig(VCTR_ZP2_INT);		// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2 ZP <20>жϱ<D0B6>־

				if (g_ecdIntProcAry[1] != NULL)
				{
					g_ecdIntProcAry[1]();
				}
			}
		}
	}
}

//--------------------------------------------------------------------
u16 g_exOutBuf[EXIO_PORT_NUM] = {0xffff};

void SetExoutEnOn(void)
{
	SetVAxisConfig(EXOUT_EN_ON);
}
void SetExoutEnOff(void)
{
	SetVAxisConfig(EXOUT_EN_OFF);
}

// <20><><EFBFBD><EFBFBD>ֵ
void SetExOutValue(u16 addr, u8 value)
{
	if (addr == 0 || addr > MAX_EXIO_ADDR)
	{
		return;
	}

	if (value == Bit_SET)
	{
		g_exOutBuf[(addr-1)/EXIO_PER_PORT] |= EXIO_ADDR_MOD(addr-1);
	}
	else
	{
		g_exOutBuf[(addr-1)/EXIO_PER_PORT] &= ~(EXIO_ADDR_MOD(addr-1));
	}
}

u8 GetExOutValue(u16 addr)
{
	if (addr == 0 || addr > MAX_EXIO_ADDR)
	{
		return 0xff;
	}

	if ((g_exOutBuf[(addr-1)/EXIO_PER_PORT] & EXIO_ADDR_MOD(addr-1)) != 0)
	{
		return Bit_SET;
	}
	return Bit_RESET;
}

void FlushExOutputs(void)
{
	u16 addr;
	for (addr = 0; addr < MAX_EXIO_ADDR; addr += EXIO_PER_PORT)
	{
		FmcWriteReg(EXIO_PORT_ADDR(addr), g_exOutBuf[(addr)/EXIO_PER_PORT]);
	}
}


// <20><><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void SetExOutput(u16 addr, u8 value)
{
	SetExOutValue(addr, value);

#if (0)
	// ֻˢ<D6BB><CBA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
	FsmcWriteReg(EXIO_PORT_ADDR(addr-1), g_exOutBuf[(addr-1)/EXIO_PER_PORT]);
#else
	// ˢ<><CBA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
	FlushExOutputs();
#endif
}

// <20><>ȡֵ
u8 GetExInput(u16 addr)
{
	if (addr == 0 || addr > MAX_EXIO_ADDR)
	{
		return Bit_SET;
	}

	return (((FmcReadReg(EXIO_PORT_ADDR(addr-1)) & EXIO_ADDR_MOD(addr-1)) != 0) ? Bit_SET : Bit_RESET);
}

void GetExInputs(u16 * pBuf)
{
	int i;

	if (pBuf == NULL)
	{
		return;
	}

	for (i = 0; i < EXIO_PORT_NUM; i++)
	{
		pBuf[i] = FmcReadReg(EXIO_PORT_ADDR(i*EXIO_PER_PORT));
	}
}

void TestFPGA(char * para1, char * para2)
{
	int p1, p2;

	if (para1 == NULL || para2 == NULL)
	{
		return;
	}

	printf("para1=%s, para2=%s\r\n", para1, para2);

	p1 = 0;
	p2 = 0;
	if (strcmp(para1, "") != 0)
	{
		p1 = atoi(para1);
	}
	if (strcmp(para2, "") != 0)
	{
		p2 = atoi(para2);
	}

	if (p1 == p2)
	{
	}

	if (p1 == -1)
	{
		u16 val = FmcReadReg(VAXIS+p2);
		printf("read addr 0x%x, val=0x%x\r\n", p2, val);
	}
	else if (p1 >= 0)
	{
		FmcWriteReg(VAXIS+p1, p2);
		printf("write addr 0x%x, val=0x%x\r\n", p1, p2);
	}
	else if (p1 == -2)
	{
		int hardver = GetFpgaHardVersion();
		printf("\r\nFPGA Hard Version = Ver %x.%x \r\n", (hardver&0xff00)>>8,(hardver&0x00ff));

		int softver = GetFpgaSoftVersion();
		printf("\r\nFPGA Soft Version = Ver %x.%x \r\n", (softver&0xff00)>>8,(softver&0x00ff));
	}
	else if (p1 == -3)
	{
		printf("op counter=%d\r\n", GetOPCounter());
	}
	else if (p1 == -4)
	{
		printf("zp counter=%d\r\n", GetZPCounter());
	}
	else if (p1 == -5)
	{
		if (p2 == 1)
		{
			ClearEcdCounter(ECD_SEL1);
			printf("ClearEcd1Counter\r\n");
		}
		else if (p2 == 2)
		{
			ClearEcdCounter(ECD_SEL2);
			printf("ClearEcd2Counter\r\n");
		}
	}
	else if (p1 == -6)
	{
		SetOpCounter(p2);
		printf("SetOpCounter %d\r\n", p2);
	}
	else if (p1 == -7)
	{
		SetZpCounter(p2);
		printf("SetZpCounter %d\r\n", p2);
	}
	else if (p1 == -8)
	{
		SetEcdCounter(ECD_SEL1, p2);
		printf("SetEcd1Counter %d\r\n", p2);
	}
	else if (p1 == -9)
	{
		SetEcdCounter(ECD_SEL2, p2);
		printf("SetEcd2Counter %d\r\n", p2);
	}
}