452 lines
14 KiB
C
452 lines
14 KiB
C
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/**
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* @file agile_modbus_slave_util.c
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* @brief Agile Modbus 软件包提供的简易从机接入源文件
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* @author 马龙伟 (2544047213@qq.com)
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* @date 2022-07-28
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*
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* @attention
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*
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* <h2><center>© Copyright (c) 2022 Ma Longwei.
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* All rights reserved.</center></h2>
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*
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*/
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#include "agile_modbus.h"
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#include "agile_modbus_slave_util.h"
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#include <string.h>
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/** @addtogroup UTIL
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* @{
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*/
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/** @defgroup SLAVE_UTIL Slave Util
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* @{
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*/
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/** @defgroup SLAVE_UTIL_Private_Functions Slave Util Private Functions
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* @{
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*/
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/**
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* @brief 根据寄存器地址从映射对象数组中获取映射对象
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* @param maps 映射对象数组
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* @param nb_maps 数组数目
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* @param address 寄存器地址
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* @return !=NULL:映射对象; =NULL:失败
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*/
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static const agile_modbus_slave_util_map_t *get_map_by_addr(const agile_modbus_slave_util_map_t *maps, int nb_maps, int address)
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{
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for (int i = 0; i < nb_maps; i++) {
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const agile_modbus_slave_util_map_t *map = &maps[i];
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if (address >= map->start_addr && address <= map->end_addr)
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return map;
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}
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return NULL;
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}
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/**
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* @brief 读取寄存器
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* @param ctx modbus 句柄
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* @param slave_info 从机信息体
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* @param slave_util 从机功能结构体
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* @return =0:正常;
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* <0:异常
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* (-AGILE_MODBUS_EXCEPTION_UNKNOW(-255): 未知异常，从机不会打包响应数据)
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* (其他负数异常码: 从机会打包异常响应数据)
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*/
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static int read_registers(agile_modbus_t *ctx, struct agile_modbus_slave_info *slave_info, const agile_modbus_slave_util_t *slave_util)
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{
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uint8_t map_buf[AGILE_MODBUS_MAX_PDU_LENGTH];
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int function = slave_info->sft->function;
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int address = slave_info->address;
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int nb = slave_info->nb;
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int send_index = slave_info->send_index;
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const agile_modbus_slave_util_map_t *maps = NULL;
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int nb_maps = 0;
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switch (function) {
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case AGILE_MODBUS_FC_READ_COILS: {
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maps = slave_util->tab_bits;
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nb_maps = slave_util->nb_bits;
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} break;
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case AGILE_MODBUS_FC_READ_DISCRETE_INPUTS: {
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maps = slave_util->tab_input_bits;
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nb_maps = slave_util->nb_input_bits;
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} break;
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case AGILE_MODBUS_FC_READ_HOLDING_REGISTERS: {
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maps = slave_util->tab_registers;
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nb_maps = slave_util->nb_registers;
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} break;
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case AGILE_MODBUS_FC_READ_INPUT_REGISTERS: {
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maps = slave_util->tab_input_registers;
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nb_maps = slave_util->nb_input_registers;
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} break;
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default:
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return -AGILE_MODBUS_EXCEPTION_ILLEGAL_FUNCTION;
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}
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if (maps == NULL)
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return 0;
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for (int now_address = address, i = 0; now_address < address + nb; now_address++, i++) {
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const agile_modbus_slave_util_map_t *map = get_map_by_addr(maps, nb_maps, now_address);
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if (map == NULL)
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continue;
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int map_len = map->end_addr - now_address + 1;
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if (map->get) {
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memset(map_buf, 0, sizeof(map_buf));
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map->get(map_buf, sizeof(map_buf));
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int index = now_address - map->start_addr;
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int need_len = address + nb - now_address;
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if (need_len > map_len) {
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need_len = map_len;
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}
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if (function == AGILE_MODBUS_FC_READ_COILS || function == AGILE_MODBUS_FC_READ_DISCRETE_INPUTS) {
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uint8_t *ptr = map_buf;
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for (int j = 0; j < need_len; j++) {
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agile_modbus_slave_io_set(ctx->send_buf + send_index, i + j, ptr[index + j]);
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}
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} else {
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uint16_t *ptr = (uint16_t *)map_buf;
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for (int j = 0; j < need_len; j++) {
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agile_modbus_slave_register_set(ctx->send_buf + send_index, i + j, ptr[index + j]);
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}
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}
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}
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now_address += map_len - 1;
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i += map_len - 1;
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}
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return 0;
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}
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/**
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* @brief 写寄存器
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* @param ctx modbus 句柄
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* @param slave_info 从机信息体
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* @param slave_util 从机功能结构体
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* @return =0:正常;
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* <0:异常
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* (-AGILE_MODBUS_EXCEPTION_UNKNOW(-255): 未知异常，从机不会打包响应数据)
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* (其他负数异常码: 从机会打包异常响应数据)
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*/
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static int write_registers(agile_modbus_t *ctx, struct agile_modbus_slave_info *slave_info, const agile_modbus_slave_util_t *slave_util)
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{
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uint8_t map_buf[AGILE_MODBUS_MAX_PDU_LENGTH];
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int function = slave_info->sft->function;
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int address = slave_info->address;
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int nb = 0;
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const agile_modbus_slave_util_map_t *maps = NULL;
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int nb_maps = 0;
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switch (function) {
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case AGILE_MODBUS_FC_WRITE_SINGLE_COIL:
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case AGILE_MODBUS_FC_WRITE_MULTIPLE_COILS: {
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maps = slave_util->tab_bits;
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nb_maps = slave_util->nb_bits;
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if (function == AGILE_MODBUS_FC_WRITE_SINGLE_COIL) {
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nb = 1;
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} else {
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nb = slave_info->nb;
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}
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} break;
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case AGILE_MODBUS_FC_WRITE_SINGLE_REGISTER:
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case AGILE_MODBUS_FC_WRITE_MULTIPLE_REGISTERS: {
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maps = slave_util->tab_registers;
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nb_maps = slave_util->nb_registers;
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if (function == AGILE_MODBUS_FC_WRITE_SINGLE_REGISTER) {
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nb = 1;
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} else {
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nb = slave_info->nb;
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}
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} break;
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default:
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return -AGILE_MODBUS_EXCEPTION_ILLEGAL_FUNCTION;
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}
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if (maps == NULL)
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return 0;
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for (int now_address = address, i = 0; now_address < address + nb; now_address++, i++) {
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const agile_modbus_slave_util_map_t *map = get_map_by_addr(maps, nb_maps, now_address);
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if (map == NULL)
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continue;
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int map_len = map->end_addr - now_address + 1;
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if (map->set) {
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memset(map_buf, 0, sizeof(map_buf));
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if (map->get) {
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map->get(map_buf, sizeof(map_buf));
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}
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int index = now_address - map->start_addr;
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int need_len = address + nb - now_address;
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if (need_len > map_len) {
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need_len = map_len;
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}
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if (function == AGILE_MODBUS_FC_WRITE_SINGLE_COIL || function == AGILE_MODBUS_FC_WRITE_MULTIPLE_COILS) {
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uint8_t *ptr = map_buf;
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if (function == AGILE_MODBUS_FC_WRITE_SINGLE_COIL) {
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int data = *((int *)slave_info->buf);
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ptr[index] = data;
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} else {
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for (int j = 0; j < need_len; j++) {
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uint8_t data = agile_modbus_slave_io_get(slave_info->buf, i + j);
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ptr[index + j] = data;
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}
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}
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} else {
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uint16_t *ptr = (uint16_t *)map_buf;
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if (function == AGILE_MODBUS_FC_WRITE_SINGLE_REGISTER) {
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int data = *((int *)slave_info->buf);
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ptr[index] = data;
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} else {
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for (int j = 0; j < need_len; j++) {
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uint16_t data = agile_modbus_slave_register_get(slave_info->buf, i + j);
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ptr[index + j] = data;
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}
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}
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}
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int rc = map->set(index, need_len, map_buf, sizeof(map_buf));
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if (rc != 0)
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return rc;
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}
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now_address += map_len - 1;
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i += map_len - 1;
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}
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return 0;
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}
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/**
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* @brief 掩码写寄存器
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* @param ctx modbus 句柄
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* @param slave_info 从机信息体
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* @param slave_util 从机功能结构体
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* @return =0:正常;
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* <0:异常
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* (-AGILE_MODBUS_EXCEPTION_UNKNOW(-255): 未知异常，从机不会打包响应数据)
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* (其他负数异常码: 从机会打包异常响应数据)
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*/
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static int mask_write_register(agile_modbus_t *ctx, struct agile_modbus_slave_info *slave_info, const agile_modbus_slave_util_t *slave_util)
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{
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uint8_t map_buf[AGILE_MODBUS_MAX_PDU_LENGTH];
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int address = slave_info->address;
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const agile_modbus_slave_util_map_t *maps = slave_util->tab_registers;
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int nb_maps = slave_util->nb_registers;
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if (maps == NULL)
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return 0;
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const agile_modbus_slave_util_map_t *map = get_map_by_addr(maps, nb_maps, address);
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if (map == NULL)
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return 0;
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if (map->set) {
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memset(map_buf, 0, sizeof(map_buf));
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if (map->get) {
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map->get(map_buf, sizeof(map_buf));
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}
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int index = address - map->start_addr;
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uint16_t *ptr = (uint16_t *)map_buf;
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uint16_t data = ptr[index];
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uint16_t and = (slave_info->buf[0] << 8) + slave_info->buf[1];
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uint16_t or = (slave_info->buf[2] << 8) + slave_info->buf[3];
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data = (data & and) | (or &(~and));
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ptr[index] = data;
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int rc = map->set(index, 1, map_buf, sizeof(map_buf));
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if (rc != 0)
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return rc;
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}
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return 0;
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}
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/**
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* @brief 写并读寄存器
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* @param ctx modbus 句柄
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* @param slave_info 从机信息体
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* @param slave_util 从机功能结构体
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* @return =0:正常;
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* <0:异常
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* (-AGILE_MODBUS_EXCEPTION_UNKNOW(-255): 未知异常，从机不会打包响应数据)
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* (其他负数异常码: 从机会打包异常响应数据)
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*/
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static int write_read_registers(agile_modbus_t *ctx, struct agile_modbus_slave_info *slave_info, const agile_modbus_slave_util_t *slave_util)
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{
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uint8_t map_buf[AGILE_MODBUS_MAX_PDU_LENGTH];
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int address = slave_info->address;
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int nb = (slave_info->buf[0] << 8) + slave_info->buf[1];
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int address_write = (slave_info->buf[2] << 8) + slave_info->buf[3];
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int nb_write = (slave_info->buf[4] << 8) + slave_info->buf[5];
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int send_index = slave_info->send_index;
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const agile_modbus_slave_util_map_t *maps = slave_util->tab_registers;
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int nb_maps = slave_util->nb_registers;
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if (maps == NULL)
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return 0;
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/* Write first. 7 is the offset of the first values to write */
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for (int now_address = address_write, i = 0; now_address < address_write + nb_write; now_address++, i++) {
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const agile_modbus_slave_util_map_t *map = get_map_by_addr(maps, nb_maps, now_address);
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if (map == NULL)
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continue;
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int map_len = map->end_addr - now_address + 1;
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if (map->set) {
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memset(map_buf, 0, sizeof(map_buf));
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if (map->get) {
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map->get(map_buf, sizeof(map_buf));
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}
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int index = now_address - map->start_addr;
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uint16_t *ptr = (uint16_t *)map_buf;
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int need_len = address_write + nb_write - now_address;
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if (need_len > map_len) {
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need_len = map_len;
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}
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|
|
for (int j = 0; j < need_len; j++) {
|
|||
|
|
uint16_t data = agile_modbus_slave_register_get(slave_info->buf + 7, i + j);
|
|||
|
|
ptr[index + j] = data;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
int rc = map->set(index, need_len, map_buf, sizeof(map_buf));
|
|||
|
|
if (rc != 0)
|
|||
|
|
return rc;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
now_address += map_len - 1;
|
|||
|
|
i += map_len - 1;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/* and read the data for the response */
|
|||
|
|
for (int now_address = address, i = 0; now_address < address + nb; now_address++, i++) {
|
|||
|
|
const agile_modbus_slave_util_map_t *map = get_map_by_addr(maps, nb_maps, now_address);
|
|||
|
|
if (map == NULL)
|
|||
|
|
continue;
|
|||
|
|
|
|||
|
|
int map_len = map->end_addr - now_address + 1;
|
|||
|
|
if (map->get) {
|
|||
|
|
memset(map_buf, 0, sizeof(map_buf));
|
|||
|
|
map->get(map_buf, sizeof(map_buf));
|
|||
|
|
int index = now_address - map->start_addr;
|
|||
|
|
uint16_t *ptr = (uint16_t *)map_buf;
|
|||
|
|
int need_len = address + nb - now_address;
|
|||
|
|
if (need_len > map_len) {
|
|||
|
|
need_len = map_len;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
for (int j = 0; j < need_len; j++) {
|
|||
|
|
agile_modbus_slave_register_set(ctx->send_buf + send_index, i + j, ptr[index + j]);
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
now_address += map_len - 1;
|
|||
|
|
i += map_len - 1;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
return 0;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/**
|
|||
|
|
* @}
|
|||
|
|
*/
|
|||
|
|
|
|||
|
|
/** @defgroup SLAVE_UTIL_Exported_Functions Slave Util Exported Functions
|
|||
|
|
* @{
|
|||
|
|
*/
|
|||
|
|
|
|||
|
|
/**
|
|||
|
|
* @brief 从机回调函数
|
|||
|
|
* @param ctx modbus 句柄
|
|||
|
|
* @param slave_info 从机信息体
|
|||
|
|
* @param data 私有数据
|
|||
|
|
* @return =0:正常;
|
|||
|
|
* <0:异常
|
|||
|
|
* (-AGILE_MODBUS_EXCEPTION_UNKNOW(-255): 未知异常，从机不会打包响应数据)
|
|||
|
|
* (其他负数异常码: 从机会打包异常响应数据)
|
|||
|
|
*/
|
|||
|
|
int agile_modbus_slave_util_callback(agile_modbus_t *ctx, struct agile_modbus_slave_info *slave_info, const void *data)
|
|||
|
|
{
|
|||
|
|
int function = slave_info->sft->function;
|
|||
|
|
int ret = 0;
|
|||
|
|
const agile_modbus_slave_util_t *slave_util = (const agile_modbus_slave_util_t *)data;
|
|||
|
|
|
|||
|
|
if (slave_util == NULL)
|
|||
|
|
return 0;
|
|||
|
|
|
|||
|
|
if (slave_util->addr_check) {
|
|||
|
|
ret = slave_util->addr_check(ctx, slave_info);
|
|||
|
|
if (ret != 0)
|
|||
|
|
return ret;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
switch (function) {
|
|||
|
|
case AGILE_MODBUS_FC_READ_COILS:
|
|||
|
|
case AGILE_MODBUS_FC_READ_DISCRETE_INPUTS:
|
|||
|
|
case AGILE_MODBUS_FC_READ_HOLDING_REGISTERS:
|
|||
|
|
case AGILE_MODBUS_FC_READ_INPUT_REGISTERS:
|
|||
|
|
ret = read_registers(ctx, slave_info, slave_util);
|
|||
|
|
break;
|
|||
|
|
|
|||
|
|
case AGILE_MODBUS_FC_WRITE_SINGLE_COIL:
|
|||
|
|
case AGILE_MODBUS_FC_WRITE_MULTIPLE_COILS:
|
|||
|
|
case AGILE_MODBUS_FC_WRITE_SINGLE_REGISTER:
|
|||
|
|
case AGILE_MODBUS_FC_WRITE_MULTIPLE_REGISTERS:
|
|||
|
|
ret = write_registers(ctx, slave_info, slave_util);
|
|||
|
|
break;
|
|||
|
|
|
|||
|
|
case AGILE_MODBUS_FC_MASK_WRITE_REGISTER:
|
|||
|
|
ret = mask_write_register(ctx, slave_info, slave_util);
|
|||
|
|
break;
|
|||
|
|
|
|||
|
|
case AGILE_MODBUS_FC_WRITE_AND_READ_REGISTERS:
|
|||
|
|
ret = write_read_registers(ctx, slave_info, slave_util);
|
|||
|
|
break;
|
|||
|
|
|
|||
|
|
default: {
|
|||
|
|
if (slave_util->special_function) {
|
|||
|
|
ret = slave_util->special_function(ctx, slave_info);
|
|||
|
|
} else {
|
|||
|
|
ret = -AGILE_MODBUS_EXCEPTION_ILLEGAL_FUNCTION;
|
|||
|
|
}
|
|||
|
|
} break;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
if (slave_util->done) {
|
|||
|
|
slave_util->done(ctx, slave_info, ret);
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
return ret;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/**
|
|||
|
|
* @}
|
|||
|
|
*/
|
|||
|
|
|
|||
|
|
/**
|
|||
|
|
* @}
|
|||
|
|
*/
|
|||
|
|
|
|||
|
|
/**
|
|||
|
|
* @}
|
|||
|
|
*/
|