G-CAMS-DATU/applications/fram/mb85rs.c

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2024-05-13 08:08:47 +00:00
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-05-08 LJ the first version
*/
#include <mb85rs.h>
#define SPI_DEVICE_NAME "spi3"
#define MB85RS_SPI_DEVICE_NAME "spi30"
struct rt_spi_device *spi_dev_mb85rs;
/**
rt_uint8_t data_to_write[] = {0xAA, 0xBB, 0xCC, 0xDD};
rt_uint16_t write_address = 0x0102;
rt_uint16_t num_bytes_to_write = sizeof(data_to_write);
rt_uint8_t read_buff[num_bytes_to_write];
// mb85rs_write_bytes(write_address, data_to_write, num_bytes_to_write);
mb85rs_read_bytes(write_address, read_buff, num_bytes_to_write);
for (int i = 0; i < num_bytes_to_write; i++) {
rt_kprintf("%02X ", read_buff[i]);
}
rt_kprintf("\n");
*/
//初始化
void spi_flash_mb85rs_init(void)
{
struct rt_spi_configuration cfg;
__HAL_RCC_GPIOA_CLK_ENABLE()
;
//先把设备挂载到总线上
rt_hw_spi_device_attach(SPI_DEVICE_NAME, MB85RS_SPI_DEVICE_NAME, GPIOA, GPIO_PIN_15);
//查找设备
spi_dev_mb85rs = (struct rt_spi_device *) rt_device_find(MB85RS_SPI_DEVICE_NAME);
cfg.data_width = 8;
cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_0 | RT_SPI_MSB;
cfg.max_hz = MB85RS_SPICLOCK; /* 20M */
rt_spi_configure(spi_dev_mb85rs, &cfg);
}
//INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init);
/**
* ID
*/
void mb85rs_read_id()
{
rt_uint8_t read_id = REG_READ_DEVICE_ID;
rt_uint8_t id[5] = { 0 };
rt_spi_send_then_recv(spi_dev_mb85rs, &read_id, 1, id, 5);
rt_kprintf("spi recv ID is:%x%x%x%x%x\n", id[0], id[1], id[2], id[3], id[4]);
rt_kprintf("Device ID: %02X %02X %02X %02X\n", id[0], id[1], id[2], id[3]);
}
/**
* 使
* @param select
*/
void mb85rs_write_enable(rt_uint8_t select)
{
rt_spi_send(spi_dev_mb85rs, &select, 1);
}
/**
*
* @param write_addr
* @param write_data
*/
rt_uint8_t mb85rs_write_byte(rt_uint16_t write_addr, rt_uint8_t write_data)
{
rt_uint8_t send_buff[3];
rt_uint8_t err;
mb85rs_write_enable(REG_WRITE_ENABLE);
send_buff[0] = REG_WRITE_COMMAND;
send_buff[1] = (write_addr >> 8) & 0xff;
send_buff[2] = write_addr & 0xff;
err = rt_spi_send_then_send(spi_dev_mb85rs, send_buff, 3, &write_data, 1);
mb85rs_write_enable(REG_WRITE_DISABLE);
return err;
}
/**
*
* @param write_addr
* @param write_buff
* @param write_bytes
*/
rt_uint8_t mb85rs_write_bytes(rt_uint16_t write_addr, rt_uint8_t *write_buff, rt_uint16_t write_bytes)
{
rt_uint8_t send_buff[3];
rt_uint8_t err;
mb85rs_write_enable(REG_WRITE_ENABLE);
send_buff[0] = REG_WRITE_COMMAND;
send_buff[1] = (write_addr >> 8) & 0xff;
send_buff[2] = write_addr & 0xff;
err = rt_spi_send_then_send(spi_dev_mb85rs, send_buff, 3, write_buff, write_bytes);
mb85rs_write_enable(REG_WRITE_DISABLE);
return err;
}
/**
*
* @param read_addr
* @param read_buff
* @param read_bytes
*/
rt_uint8_t mb85rs_read_bytes(rt_uint16_t read_addr, rt_uint8_t *read_buff, rt_uint16_t read_bytes)
{
rt_uint8_t send_buff[3] = { 0 };
send_buff[0] = REG_READ_COMMAND;
send_buff[1] = (read_addr >> 8) & 0xff;
send_buff[2] = read_addr & 0xff;
return rt_spi_send_then_recv(spi_dev_mb85rs, send_buff, 3, read_buff, read_bytes);
}
void mb85rs_read_device_id_write_status(rt_uint8_t write_data)
{
rt_uint8_t send_buff[2];
send_buff[0] = REG_WRITE_STATUS;
send_buff[1] = write_data;
rt_spi_send(spi_dev_mb85rs, send_buff, 2);
}
/**
*
* @return
*/
rt_uint8_t mb85rs_read_status(void)
{
rt_uint8_t read_status = 0, send_buff[1];
send_buff[0] = REG_READ_STATUS;
rt_spi_send_then_recv(spi_dev_mb85rs, send_buff, 1, &read_status, 1);
return read_status;
}
/**
*
* @param write_data
*/
void mb85rs_write_status(rt_uint8_t write_data)
{
rt_uint8_t send_buff[2];
send_buff[0] = REG_WRITE_STATUS;
send_buff[1] = write_data;
rt_spi_send(spi_dev_mb85rs, send_buff, 2);
}